This invention relates generally to forming shallow trench isolation structures in making semiconductor devices.
Particularly in advanced processes, shallow trench isolation (STI) has significant advantages over local oxidation of silicon (LOCOS) in terms of scalability. Compared to LOCOS, STI reduces oxide encroachment into the active area and hence facilitates achieving compact cell designs. However, the STI process is known to increase leakage currents which affect performance. One application of STI processes is making dynamic random access memory (DRAM) devices.
The stress created in the top and bottom corners of the trench sidewall used in STI processes is one source of leakage current. The STI process usually involves an anisotrophic etch into the silicon surface. A sidewall oxidation step grows oxide on the sidewalls of the trench. The trench sidewall contains several possible crystallographic orientations and the interface trap density is higher in the sidewall than on the silicon surface. The sidewall oxide is designed to smooth this interface and to reduce the stress in the silicon.
The oxidation rate in stressed silicon is low. Thus, the thickness of the sidewall oxide at the corner between the silicon surface and trench may be reduced. To overcome this problem, oxidation is done at a high temperature to increase the oxide thickness. However, increasing the thermal budget is generally undesirable. For example, increasing the temperature increases the depth of all the existing junctions. In advanced semiconductor processes with extremely small geometries, this is a disadvantage.
One potential solution to the problem of thin sidewall oxides at the corner between the upper surface and the trench is to create crystallographic damage at this point. It is known that such damage increases the oxidation rate. Therefore, by creating a highly damaged region at the corner, the thickness of the sidewall oxide may increase.
However, creating damage in the silicon substrate at exactly the position where stresses are known to occur may be counterproductive. In fact, the net effect of creating such damage may be to increase the possibility of leakage currents. The implant damage creates a compressive stress. As a result, crystallographic defects may create leakage causing interface states. The generation and recombination centers increase as a result of increased crystallographic defects. The use of high energy implants to create damage creates nucleation sites which create defects which may also result in increased leakage currents.
Thus, there is a continuing need for a way of producing high quality sidewall oxides without unnecessarily creating silicon damage that may result in increased leakage currents.
In accordance with one aspect of the present invention, a method of forming a trench isolation includes injecting impurities into a region in the semiconductor structure. A trench is made through the impurity laden region leaving a portion of the impurity laden region around the trench.
Other aspects are set forth in the accompanying detailed description and claims.